Stressing out copper TSVs with temperature
Thursday, September 25, 2014 - 08:20
in Physics & Chemistry
In the past, microelectronics were essentially a two-dimensional affair based upon flat integrated circuit chips connected to each other. Then, engineers opened up the third dimension, with integrated circuit chips stacked one atop another and joined electrically by vertical copper interconnects called through-silicon vias (TSVs) that passed completely through the silicon wafers. But while such TSV technology allows denser circuit design with higher performance, it also increases susceptibility to the inevitable thermal fatigue that occurs in any physical system repeatedly subjected to fluctuating temperature extremes.