Researchers advance scheme to design seamless integrated circuits etched on graphene

(Phys.org) —Researchers in electrical and computer engineering at University of California, Santa Barbara have introduced and modeled an integrated circuit design scheme in which transistors and interconnects are monolithically patterned seamlessly on a sheet of graphene, a 2-dimensional plane of carbon atoms. The demonstration offers possibilities for ultra energy-efficient, flexible, and transparent electronics.

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